25 #ifndef _JIT_COMPILER2_X86_64REGISTER
26 #define _JIT_COMPILER2_X86_64REGISTER
55 : index(index), extented(extented), name(name), offset(offset),
96 return OS << reg.
name;
209 class RegisterFile :
public compiler2::RegisterFile {
247 ABORT_MSG(
"X86_64 Register File Type Not supported!",
GPRegister RDX("RDX", 0x2, false, 0x2 *8, 8)
virtual MachineOperand::IdentifyTy id_base() const =0
const MachineOperand::IdentifySizeTy size
GPRegister R9("R9", 0x1, true, 0x9 *8, 8)
X86_64Register * cast_to< X86_64Register >(Register *reg)
static const uint8_t base
const unsigned IntegerArgumentRegisterSize
This represents a machine register usage.
Register * cast_to< Register >(MachineOperand *op)
GPRegister(const char *name, unsigned index, bool extented_gpr, MachineOperand::IdentifyOffsetTy offset, MachineOperand::IdentifySizeTy size)
SSERegister XMM6("XMM6", 0x6, false, 0x6 *16, 16)
GPRegister R11("R11", 0x3, true, 0xb *8, 8)
SSERegister XMM9("XMM9", 0x1, true, 0x9 *16, 16)
SSERegister * FloatArgumentRegisters[]
SSERegister XMM1("XMM1", 0x1, false, 0x1 *16, 16)
SSERegister XMM4("XMM4", 0x4, false, 0x4 *16, 16)
virtual IdentifyTy id_base() const
SSERegister XMM12("XMM12", 0x4, true, 0xc *16, 16)
virtual MachineOperand::IdentifyTy id_base() const
virtual NativeRegister * to_NativeRegister()
JNIEnv jclass jobject const char * name
JNIEnv jthread jobject jclass jlong size
GPRegister R12("R12", 0x4, true, 0xc *8, 8)
X86_64Register(const char *name, unsigned index, bool extented, MachineOperand::IdentifyOffsetTy offset, MachineOperand::IdentifySizeTy size)
GPRegister R14("R14", 0x6, true, 0xe *8, 8)
GPRegister RSI("RSI", 0x6, false, 0x6 *8, 8)
std::size_t IdentifyOffsetTy
SSERegister XMM10("XMM10", 0x2, true, 0xa *16, 16)
SSERegister XMM2("XMM2", 0x2, false, 0x2 *16, 16)
virtual MachineOperand::IdentifyOffsetTy id_offset() const
OStream & operator<<(OStream &OS, const ModRMOperandDesc &modrm)
GPRegister RBP("RBP", 0x5, false, 0x5 *8, 8)
virtual MachineOperand::IdentifySizeTy id_size() const
FPUStackRegister(unsigned index)
SSERegister(const char *name, unsigned index, bool extented_gpr, MachineOperand::IdentifyOffsetTy offset, MachineOperand::IdentifySizeTy size)
Simple stream class for formatted output.
unsigned get_index() const
static const uint8_t base
virtual MachineRegister * to_MachineRegister()
virtual IdentifySizeTy id_size() const
const unsigned FloatArgumentRegisterSize
GPRegister * IntegerArgumentRegisters[]
GPRegister R15("R15", 0x7, true, 0xf *8, 8)
SSERegister XMM5("XMM5", 0x5, false, 0x5 *16, 16)
GPRegister R13("R13", 0x5, true, 0xd *8, 8)
std::size_t IdentifySizeTy
SSERegister XMM13("XMM13", 0x5, true, 0xd *16, 16)
NativeRegister(Type::TypeID type, X86_64Register *reg)
GPRegister RDI("RDI", 0x7, false, 0x7 *8, 8)
GPRegister RCX("RCX", 0x1, false, 0x1 *8, 8)
virtual NativeRegister * to_NativeRegister()=0
virtual MachineRegister * to_MachineRegister()
Operands that can be directly used by the machine (register, memory, stackslot)
GPRegister R10("R10", 0x2, true, 0xa *8, 8)
virtual MachineOperand::IdentifyTy id_base() const
SSERegister XMM7("XMM7", 0x7, false, 0x7 *16, 16)
GPRegister RAX("RAX", 0x0, false, 0x0 *8, 8)
SSERegister XMM8("XMM8", 0x0, true, 0x8 *16, 16)
SSERegister XMM3("XMM3", 0x3, false, 0x3 *16, 16)
SSERegister XMM0("XMM0", 0x0, false, 0x0 *16, 16)
virtual IdentifyOffsetTy id_offset() const
SSERegister XMM14("XMM14", 0x6, true, 0xe *16, 16)
SSERegister XMM11("XMM11", 0x3, true, 0xb *16, 16)
#define ABORT_MSG(EXPR_SHORT, EXPR_LONG)
GPRegister R8("R8", 0x0, true, 0x8 *8, 8)
GPRegister RBX("RBX", 0x3, false, 0x3 *8, 8)
const MachineOperand::IdentifyOffsetTy offset
GPRegister RSP("RSP", 0x4, false, 0x4 *8, 8)
X86_64Register * get_X86_64Register() const
SSERegister XMM15("XMM15", 0x7, true, 0xf *16, 16)