26 #ifndef CODEGEN_COMMON_HPP_
27 #define CODEGEN_COMMON_HPP_ 1
53 #define MCODEINITSIZE (1<<15)
54 #define DSEGINITSIZE (1<<12)
56 #define NCODEINITSIZE (1<<15)
64 #define PACK_REGS(low,high) \
65 ( (((high) & 0x0000ffff) << 16) | ((low) & 0x0000ffff) )
67 #define GET_LOW_REG(a) ((a) & 0x0000ffff)
68 #define GET_HIGH_REG(a) (((a) & 0xffff0000) >> 16)
73 #if SIZEOF_VOID_P == 8
74 # define REG_LRESULT REG_RESULT
75 # define REG_LTMP12 REG_ITMP1
76 # define REG_LTMP23 REG_ITMP2
78 # define REG_LRESULT REG_RESULT_PACKED
79 # define REG_LTMP12 REG_ITMP12_PACKED
80 # define REG_LTMP23 REG_ITMP23_PACKED
86 #define BRANCH_UNCONDITIONAL -1
88 #define BRANCH_EQ (ICMD_IFEQ - ICMD_IFEQ)
89 #define BRANCH_NE (ICMD_IFNE - ICMD_IFEQ)
90 #define BRANCH_LT (ICMD_IFLT - ICMD_IFEQ)
91 #define BRANCH_GE (ICMD_IFGE - ICMD_IFEQ)
92 #define BRANCH_GT (ICMD_IFGT - ICMD_IFEQ)
93 #define BRANCH_LE (ICMD_IFLE - ICMD_IFEQ)
95 #define BRANCH_ULT 256
96 #define BRANCH_ULE 257
97 #define BRANCH_UGE 258
98 #define BRANCH_UGT 259
100 #define BRANCH_NAN 260
105 #define BRANCH_OPT_NONE 0
118 #if defined(ENABLE_INTRP)
123 u4 lastinstwithoutdispatch;
125 s4 lastpatcheroffset;
137 #if defined(__I386__) || defined(__X86_64__) || defined(__XDSPCORE__) || defined(ENABLE_INTRP) || defined(__S390__)
148 #if defined(ENABLE_REPLACEMENT)
149 rplpoint *replacementpoint;
154 #define CODEGENDATA_FLAG_ERROR 0x00000001
155 #define CODEGENDATA_FLAG_LONGBRANCHES 0x00000002
158 #define CODEGENDATA_HAS_FLAG_ERROR(cd) \
159 ((cd)->flags & CODEGENDATA_FLAG_ERROR)
161 #define CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd) \
162 ((cd)->flags & CODEGENDATA_FLAG_LONGBRANCHES)
217 #if defined(USES_PATCHABLE_MEMORY_BARRIER)
221 #if defined(ENABLE_INTRP)
229 #if defined(ENABLE_INTRP)
238 #if defined(ENABLE_REPLACEMENT)
240 void codegen_set_replacement_point_notrap(
codegendata *cd,
s4 type);
241 void codegen_set_replacement_point(
codegendata *cd,
s4 type);
243 void codegen_set_replacement_point_notrap(
codegendata *cd);
244 void codegen_set_replacement_point(
codegendata *cd);
256 #if defined(ENABLE_SSA)
264 #endif // CODEGEN_COMMON_HPP_
void codegen_emit_instruction(jitdata *jd, instruction *iptr)
Generates machine code for one ICMD.
DumpList< Linenumber > * linenumbers
List of line numbers.
s4 codegen_reg_of_var(u2 opcode, varinfo *v, s4 tempregnum)
void codegen_emit_stub_native(jitdata *jd, methoddesc *nmd, functionptr f, int skipparams)
void codegen_increase(codegendata *cd)
java_object_t * codegen_finish_native_call(u1 *sp, u1 *pv)
void(* functionptr)(void)
java_handle_t * codegen_start_native_call(u1 *sp, u1 *pv)
s4 codegen_reg_of_dst(jitdata *jd, instruction *iptr, s4 tempregnum)
void codegen_resolve_branchrefs(codegendata *cd, basicblock *bptr)
DumpList< branch_label_ref_t * > * brancheslabel
void codegen_branch_label_add(codegendata *cd, s4 label, s4 condition, s4 reg, u4 options)
void codegen_setup(jitdata *jd)
void codegen_emit_stub_compiler(jitdata *jd)
void codegen_emit_epilog(jitdata *jd)
Generates machine code for the method epilog.
void codegen_add_branch_ref(codegendata *cd, basicblock *target, s4 condition, s4 reg, u4 options)
List implementation with dump memory.
void codegen_emit_prolog(jitdata *jd)
Generates machine code for the method prolog.
bool codegen_generate(jitdata *jd)
bool intrp_codegen(jitdata *jd)
void codegen_emit_patchable_barrier(instruction *iptr, codegendata *cd, patchref_t *pr, fieldinfo *fi)
Generates a memory barrier to be used after volatile writes.
bool codegen_emit(jitdata *jd)
Generates machine code.
void codegen_finish(jitdata *jd)
Represents a Java line number.