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48 #define mptr_itmp2 itmp2
50 #define xptr_itmp2 itmp2
51 #define xpc_itmp3 itmp3
89 #define SAVE_FLOAT_RETURN_REGISTER(off) \
90 std fv0,[%sp + bias + ((off)*8)] ;
92 #define RESTORE_FLOAT_RETURN_REGISTER(off) \
93 ldd [%sp + bias + ((off)*8)],fv0 ;
96 #define SAVE_FLOAT_ARGUMENT_REGISTERS(off) \
97 std fa0,[%sp + bias + ((0+(off))*8)] ; \
98 std fa1,[%sp + bias + ((1+(off))*8)] ; \
99 std fa2,[%sp + bias + ((2+(off))*8)] ; \
100 std fa3,[%sp + bias + ((3+(off))*8)] ; \
101 std fa4,[%sp + bias + ((4+(off))*8)] ;
104 #define RESTORE_FLOAT_ARGUMENT_REGISTERS(off) \
105 ldd [%sp + bias + ((0+(off))*8)],fa0 ; \
106 ldd [%sp + bias + ((1+(off))*8)],fa1 ; \
107 ldd [%sp + bias + ((2+(off))*8)],fa2 ; \
108 ldd [%sp + bias + ((3+(off))*8)],fa3 ; \
109 ldd [%sp + bias + ((4+(off))*8)],fa4 ;
111 #define SAVE_FLOAT_TEMPORARY_REGISTERS(off) \
112 std ft0,[%sp + bias + ((0+(off))*8)] ; \
113 std ft1,[%sp + bias + ((1+(off))*8)] ; \
114 std ft2,[%sp + bias + ((2+(off))*8)] ; \
115 std ft3,[%sp + bias + ((3+(off))*8)] ; \
116 std ft4,[%sp + bias + ((4+(off))*8)] ; \
117 std ft5,[%sp + bias + ((5+(off))*8)] ; \
118 std ft6,[%sp + bias + ((6+(off))*8)] ; \
119 std ft7,[%sp + bias + ((7+(off))*8)] ; \
120 std ft8,[%sp + bias + ((8+(off))*8)] ; \
121 std ft9,[%sp + bias + ((9+(off))*8)] ; \
123 #define RESTORE_FLOAT_TEMPORARY_REGISTERS(off) \
124 ldd [%sp + bias + ((0+(off))*8)],ft0 ; \
125 ldd [%sp + bias + ((1+(off))*8)],ft1 ; \
126 ldd [%sp + bias + ((2+(off))*8)],ft2 ; \
127 ldd [%sp + bias + ((3+(off))*8)],ft3 ; \
128 ldd [%sp + bias + ((4+(off))*8)],ft4 ; \
129 ldd [%sp + bias + ((5+(off))*8)],ft5 ; \
130 ldd [%sp + bias + ((6+(off))*8)],ft6 ; \
131 ldd [%sp + bias + ((7+(off))*8)],ft7 ; \
132 ldd [%sp + bias + ((8+(off))*8)],ft8 ; \
133 ldd [%sp + bias + ((9+(off))*8)],ft9 ; \
137 #endif // MD_ASM_HPP_